Resources #
These resource pages were distributed week by week during the course.
Many of these resources require access to online academic journals.
Week 1: Greetings, The Flow, Floorplannning, and Power Delivery #
Lecture slides from ETH Zurich’s VLSI2
- This is a great extended recap of VLSI implementation topics (à la ECE 260B)
- The Croc SoC described in this lecture series will be the basis for our Final Project.
Paper: “OpenROAD: Toward a Self-Driving, Open-Source Digital Layout Implementation Tool Chain”
- OpenROAD’s original paper (DAC 2019)
About OpenROAD and OpenROAD’s mission
- Similar to the paper but with more information about the application and flow. Part of the OpenROAD documentation.
OpenROAD’s Documentation and OpenROAD-Flow-Scripts Documentation
Textbook: VLSI Physical Design: From Graph Partitioning to Timing Closure
- Chapter 1 Introduction + slides
- Chapter 3 Chip Planning + slides
- Textbook website
- Springer online edition of the full textbook (needs UCSD network/VPN)
Week 2: The Database & Synthesis #
Springer’s Advanced Logic Synthesis, Chapter 4 – Physical Awareness Starting at Technology-Independent Logic Synthesis Advanced Logic Synthesis | SpringerLink
- Chapter 4 – Springer’s Machine Learning Applications in EDA, Chapter 7 - Machine Learning for Logic Synthesis Machine Learning Applications in Electronic Design Automation | SpringerLink
- DAGON – the DAG/tree covering algorithm covered in the Classical Technology Mapping section of Lecture 4 - DAGON: Technology Binding and Local Optimization by DAG Matching | IEEE Conference Publication | IEEE Xplore
Week 3 & 4: Static Timing Analysis & Place-&-Route #
Textbook: Static Timing Analysis for Nanometer Designs: A Practical Approach
- Recommended: Chapters 1-2 introducing STA and STA concepts
- Springer online edition of the full textbook
OpenSTA Project
- GitHub Repo + Documentation (PDF)
Textbook: VLSI Physical Design: From Graph Partitioning to Timing Closure
- Recommended Chapters 4-5-6 – Provided as a single PDF.
- Chapter 4 Placement + Slides
- Chapter 5 Global Routing + Slides
- Chapter 6 Detailed Routing + Slides
- Textbook website
- Springer online edition of the full textbook
Paper: “RePlAce: Advancing Solution Quality and Routability Validation in Global Placement”
- OpenROAD’s global placer – GPL
- Based on the work “ePlace: Electrostatics based Placement using Fast Fourier Transform
and Nesterov’s Method” – Read this first.
Paper: Fence-Region-Aware Mixed-Height Standard Cell Legalization
- OpenROAD’s detailed placer – DPL – also known as OpenDP
Paper: Detailed placement accounting for technology constraints
- Adapted into OpenROAD’s detailed placement optimizer – DPO
Paper: Eh?Placer: A High-Performance Modern Technology-Driven Placer
Paper: Modern VLSI Placement Observing Technology Constraints
Week 5: PDKs & SoCs #
Textbook: Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon – PDK Engineering
Textbook: Modern VLSI design: IP-based design – SoC Design
- Chapter 6: Subsystem Design
- Chapter 7: Floorplanning
- Chapter 8: Architecture Design
- A paper on the PDK we use in this class – IHP130
Croc: the SoC you will be expanding on for the final project
Week 6: Physical Synthesis & DFM #
Paper: Enhancing sensitivity-based power reduction for an industry IC design context
- This is the paper for TritonSizer++, the precursor to OpenROAD’s rsz.
Textbook: Springer’s Advanced Logic Synthesis, Chapter 4 – Physical Awareness Starting at Technology-Independent Logic Synthesis
Papers: on Dummy Fill from ABKGroup
Paper: 2.5D RCX
Paper: Advanced Routing in Changing Technology Landscape
- Routing challenges – this paper is 20+ years old but remains relevant.
BlobPlace – Cluster-based Placement #
Paper: PPA-Relevant Clustering-Driven Placement for Large-Scale VLSI Designs
- This work is the subject of Tuesday’s lecture.
Paper: Finding Placement-Relevant Clusters With Fast Modularity-Based Clustering
Week 8: Routers Deep-dive & ML with OpenROAD #
- Paper: TritonRoute: The Open Source Detailed Router
- Paper: TritonRoute-WXL: The Open Source Router with Integrated DRC Engine
- Paper: The Tao of PAO: Anatomy of a Pin Access Oracle for Detailed Routing
- Paper: In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence
- Paper: OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education
- Paper: Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design