Week 1: Greetings, The Flow, Floorplannning, and Power Delivery

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• Lecture slides from ETH Zurich’s VLSI2

  • This is a great extended recap of VLSI implementation topics (à la ECE 260B)
  • The Croc SoC described in this lecture series will be the basis for our Final Project.

• Paper: “OpenROAD: Toward a Self-Driving, Open-Source Digital Layout Implementation Tool Chain”

  • OpenROAD’s original paper (DAC 2019)

• Paper: “Open-source EDA: If we build it, who will come?”

• About OpenROAD and OpenROAD’s mission

  • Similar to the paper but with more information about the application and flow. Part of the OpenROAD documentation.

• OpenROAD’s Documentation and OpenROAD-Flow-Scripts Documentation

• Textbook: VLSI Physical Design: From Graph Partitioning to Timing Closure

  • Chapter 1 Introduction + slides
  • Chapter 3 Chip Planning + slides
  • Textbook website
  • Springer online edition of the full textbook (needs UCSD network/VPN)

• Prof Austin Rovinski’s Intro to Physical Design Databases course on YouTube

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Week 2: The Database & Synthesis

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• The OpenDB paper

• The Yosys paper

• Springer’s Advanced Logic Synthesis, Chapter 4 – Physical Awareness Starting at Technology-Independent Logic Synthesis Advanced Logic Synthesis | SpringerLink

• Chapter 4 – Springer’s Machine Learning Applications in EDA, Chapter 7 - Machine Learning for Logic Synthesis  Machine Learning Applications in Electronic Design Automation | SpringerLink

• DAGON – the DAG/tree covering algorithm covered in the Classical Technology Mapping section of Lecture 4 - DAGON: Technology Binding and Local Optimization by DAG Matching | IEEE Conference Publication | IEEE Xplore

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Week 3 & 4: Static Timing Analysis & Place-&-Route

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• Textbook: Static Timing Analysis for Nanometer Designs: A Practical Approach 

  • Recommended: Chapters 1-2 introducing STA and STA concepts
  • Springer online edition of the full textbook

• OpenSTA Project

  • GitHub Repo + Documentation (PDF)

• Textbook: VLSI Physical Design: From Graph Partitioning to Timing Closure

  • Recommended Chapters 4-5-6 – Provided as a single PDF.
  • Chapter 4 Placement + Slides
  • Chapter 5 Global Routing + Slides
  • Chapter 6 Detailed Routing + Slides
  • Textbook website
  • Springer online edition of the full textbook 

• Paper: “RePlAce: Advancing Solution Quality and Routability Validation in Global Placement”

  • OpenROAD’s global placer – GPL
  • Based on the work “ePlace: Electrostatics based Placement using Fast Fourier Transform
    and Nesterov’s Method” – Read this first.

• Paper: Fence-Region-Aware Mixed-Height Standard Cell Legalization

  • OpenROAD’s detailed placer – DPL – also known as OpenDP

• Paper: Detailed placement accounting for technology constraints

  • Adapted into OpenROAD’s detailed placement optimizer – DPO

• Paper: Eh?Placer: A High-Performance Modern Technology-Driven Placer

• Paper: Modern VLSI Placement Observing Technology Constraints

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Week 5: PDKs & SoCs

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• Textbook: Engineering the CMOS Library: Enhancing Digital Design Kits for Competitive Silicon – PDK Engineering

• Textbook: Modern VLSI design: IP-based design – SoC Design

  • Chapter 6: Subsystem Design
  • Chapter 7: Floorplanning
  • Chapter 8: Architecture Design

• Paper: On the Versatility of the IHP BiCMOS Open Source and Manufacturable PDK: A step towards the future where anybody can design and build a chip

  • A paper on the PDK we use in this class – IHP130

• Croc: the SoC you will be expanding on for the final project

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Week 6: Physical Synthesis & DFM

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• Paper: Enhancing sensitivity-based power reduction for an industry IC design context

  • This is the paper for TritonSizer++, the precursor to OpenROAD’s rsz.

• Textbook: Springer’s Advanced Logic Synthesis, Chapter 4 – Physical Awareness Starting at Technology-Independent Logic Synthesis

• Papers: on Dummy Fill from ABKGroup

  • Filling Algorithms and Analyses for Layout Density Control
  • CMP Fill Synthesis: A Survey of Recent Studies

• Paper: 2.5D RCX 

• Paper: Advanced Routing in Changing Technology Landscape

  • Routing challenges – this paper is 20+ years old but remains relevant.

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BlobPlace – Cluster-based Placement

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• Paper: PPA-Relevant Clustering-Driven Placement for Large-Scale VLSI Designs

  • This work is the subject of Tuesday’s lecture.

• Paper: Finding Placement-Relevant Clusters With Fast Modularity-Based Clustering

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Week 8: Routers Deep-dive & ML with OpenROAD

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• Paper: TritonRoute: The Open Source Detailed Router
• Paper: TritonRoute-WXL: The Open Source Router with Integrated DRC Engine
• Paper: The Tao of PAO: Anatomy of a Pin Access Oracle for Detailed Routing
• Paper: In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence

• Paper: OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education
• Paper: Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design

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